1. Field of the Invention
The present invention relates to a leadframe and a semiconductor package adopting the same, and more particularly, to a leadframe adopting a chip pad capable of dissipating heat produced by a chip, and a semiconductor package adopting the leadframe.
2. Description of the Related Art
Semiconductor devices are used for processing information or signals, in addition to controlling current or power in electric or electronic circuits. The semiconductor device in controlling current or power consumes a relatively high current or voltage compared to the device for information or signal processing. For this reason, the current or power controlling semiconductor device is referred to as a power device, as distinguished from general semiconductor devices.
Semiconductor packages in which such power devices are embedded produce a large amount of heat, because a high current flows through the semiconductor packages at a high operating voltage. To dissipate heat produced by a chip embedded in such a semiconductor package, a heat spreader or a heat slug is inserted below or attached to a chip mounting pad. Recently, the backside of the chip pad is directly exposed to the outside to dissipate heat, thereby reducing the production cost of semiconductor packages.
Such a technique of exposing the chip pad of the semiconductor package to the outside is described in U.S. Pat. No. 5,594,234 (entitled "Downset Exposed Die Mount Pad Leadframe and Package" and assigned to Texas Instruments Corp. on Jun. 14, 1997), and U.S. Pat. No. 5,440,269 (entitled "Resin-packaged Semiconductor Device with Flow Prevention Dimples" and assigned to Mitsubishi Denki Kabushiki Kaisha on Aug. 8, 1995).
FIG. 1 is a sectional view of a conventional semiconductor package issued to Texas Instruments Corp. Referring to FIG. 1, a chip 39 is attached to a chip pad 31 of a leadframe and molded into a semiconductor package using an epoxy mold compound (EMC) 40. Reference numeral 36 represents leads, reference numeral 31a represents the bottom of the chip pad 31, and reference numerals 34 and 35 represent wings which extend upward and outward from the chip pad 31 so as to increase the moisture path.
However, such a semiconductor package with wings causes flash on the bottom of the semiconductor package during the molding process with a molding material. In other words, the EMC flows over the bottom of the chip pad, so that a linear distinct boundary line cannot be formed between the exposed portion and the sealed portion of the chip pad. As a result, the exposed portion of the bottom surface of the chip pad cannot be formed to have a trim rectangular outline, and instead has an irregular outline because of the flowed molding material. Since the flowed molding material covers the bottom of the chip pad, which serves as the heat conducting path, the heat dissipating effect of the chip pad is lowered. To solve this problem, an additional deflash process must be carried out on the semiconductor package after the molding process is completed. The deflash process means the process of dipping the semiconductor package in a solution to dissolve and remove the unnecessary flowed molding material from the bottom of the chip pad. In addition, such a semiconductor package having the chip pad exposed to the outside is susceptible to thermal stress.
FIG. 2 is a sectional view of another conventional semiconductor package assigned to Mitsubishi Denki Kabushiki Kaisha, and FIG. 3 is a bottom view of the semiconductor package of FIG. 2.
Referring to FIGS. 2 and 3, dimples 25 are formed on the bottom 2b of the chip pad 2a to prevent flashing during molding with a molding material. Also, the edge of the chip pad is completely surrounded with the molding material, which increases the moisture path. However, a step between the bottom 2b of the chip pad 2a and the bottom of the molding material hinder direct contact with a printed circuit board (PCB) 30, and the reduction of the bottom area of the chip pad by the molding material, lowers the heat dissipating efficiency. In FIGS. 2 and 3, reference numeral 3 represents epoxy for attaching a chip 1 to a chip pad 2a, reference numeral 4 represents a gold wire, reference numeral 5 represents an inner lead, reference numeral 6 represents an EMC, reference numeral 7 represents an outer lead, and reference numeral 30 represents a PCB on which the semiconductor package is mounted.
However, the semiconductor package with dimples cannot suppress flashing at non-dimple portions of the semiconductor package, and deteriorates heat dissipating characteristics. In addition, since the chip pad of the semiconductor package directly contacts the PCB, the chip pad is susceptible to thermal stress.